LaMeres' Publications

 Thesis / Dissertation

  1. Brock J. LaMeres, "Design and Implementation of a Fuzzy Logic Voltage Controller for a Synchronous Generator", B.S. Thesis, Montana State University, Bozeman, MT, 1998. (PDF) (Slides)

  2. Brock J. LaMeres, "Characterization of a Printed Circuit Board Via", M.S Thesis, University of Colorado, Colorado Springs, CO, 2001. (PDF) (Slides)

  3. Brock J. LaMeres, "Novel Design Techniques to Reduce Simultaneous Switching Noise in VLSI Packaging", Ph.D. Dissertation, University of Colorado, Boulder, CO, 2005. (PDF) (Slides)

Books

  1. Chunjie Duan, Brock LaMeres, & Sunil Khatri, On and Off Chip Cross-Talk Avoidance in VLSI Designs, Springer Publication, 2010, ISBN 978-1-4419-0946-6. (PDF of Cover & Table of Contents)

  2. Brock J. LaMeres, Introduction to Logic Circuits & Logic Design with VHDL, Springer International Publishing, 2016, ISBN 978-3-319-34194-1. (PDF of Cover & Table of Contents) (Supplementary Materials)

  3. Brock J. LaMeres, Introduction to Logic Circuits & Logic Design with Verilog, Springer International Publishing, 2017, ISBN 978-3-319-53882-2. (PDF of Cover & Table of Contents)

Peer Reviewed Manuscripts

The following underwent a full peer review of the entire manuscript prior to being published in a journal or conference proceedings. Papers >#20 are since becoming a professor.

  1. M.H. Nehrir, G. Venkataramanan, V. Gerez, and B. LaMeres, "Component Sizing for Stand-Alone Wind-Electric Generating Systems: Frequency and Time Span of Data Needed", Proceedings, 17th Annual ASME Wind Energy Symposium, Reno, NV, Jan 11-15, 1998. (PDF)

  2. M.H. Nehrir, V. Gerez, and B.J. LaMeres, "Shifting Residential Electric Thermal Storage Loads: An Automated Fuzzy Logic-Based Control Strategy", Proceedings, 1998 World Automation Congress, (WAC-98), Anchorage, AK, May 10-14, 1998. (PDF)

  3. B.J. LaMeres, M.H. Nehrir, and V. Gerez, "Controlling the Average Residential Electric Water Heater Power Demand Using Fuzzy Logic", Proceedings, 1998 North American Power Symposium, Cleveland, OH, Oct 18-20, 1998. (PDF)

  4. B.J. LaMeres, M.H. Nehrir, and V. Gerez, "Controlling the Average Residential Electric Water Heater Power Demand Using Fuzzy Logic", Journal of Electric Power Systems Research, vol. 52, pp. 267-271, February 1999. (PDF)

  5. Brock J. LaMeres, M.H. Nehrir, "Fuzzy Logic Based Voltage Controller for a Synchronous Generator", IEEE Computer Applications in Power, vol. 12, no. 2, pp. 46-49, April 1999. (PDF)

  6. M.H. Nehrir, B.J. LaMeres, and V. Gerez, "A Customer-Interactive Electric Water Heater Demand-Side Management Strategy Using Fuzzy Logic", IEEE Power Engineering Society Winter Meeting, New York, NY Jan 31 - Feb 4, 1999. (PDF)

  7. M.H. Nehrir, B.J. LaMeres, G. Venkataramanan, V. Gerez, L.A. Alvarado, "Performance Evaluation of Stand-Alone Wind/PV Generating Systems", IEEE Power Engineering Society Summer Meeting, Edmonton, Alta, Canada, vol. 1, pp. 555-559, July 18-22, 1999. (PDF)

  8. H. Salehfar, P.J. Noll, B.J. LaMeres, M.H. Nehrir, V. Gerez, "Fuzzy logic-based direct load control of residential electric water heaters and ACs recognizing customer preferences in a deregulated environment", IEEE Power Engineering Society Summer Meeting, Edmonton, Alta, Canada, vol. 2, pp. 1055-1060, July 18-22, 1999. (PDF)

  9. B.J. LaMeres and M.H. Nehrir, "A Fuzzy Logic-Based Synchronous Generator Voltage Regulator Optimized with a Genetic Algorithm", Proceedings, 2000 World Automation Congress, (WAC-00), Maui, HI, June 11-16, 2000. (PDF)

  10. M.H. Nehrir, B.J. LaMeres, G. Venkataramanan, V.Gerez, and L.A. Alvarado, "An Approach to Evaluate the General Performance of Stand-Alone Wind/Photovoltaic Generating Systems", IEEE Transactions on Energy Conversion, vol 15, no. 4, pp. 433-439, December 2000. (PDF)

  11. M.H. Nehrir, and B.J. LaMeres, "A multiple-block fuzzy logic-based electric water heater demand-side management strategy for leveling distribution feeder demand profile", Journal of Electric Power Systems Research, vol. 56, pp. 225-230, March 2000. (PDF)

  12. Brock J. LaMeres, T.S. Kalkur, "Time Domain Analysis of a Printed Circuit Board Via", Microwave Journal, vol. 43, no. 11, pp. 76-84, November 2000. (PDF)

  13. B.J. LaMeres and T.S. Kalkur, "Effect of Ground Vias on Changing Signal Layers in a Multi-Layered PCB", Microwave and Optical Technology Letters, vol. 28, no. 4, pp. 257-260, February 20, 2001. (PDF)

  14. Brock LaMeres, "FPGA I/O - When to go Serial", IEE Electronic Systems and Software, vol. 2, no. 3, pp. 14-18, June 2004. (PDF)

  15. B.J. LaMeres and S.P. Khatri, "Encoding-based Minimization of Inductive X-talk for Off-chip Data Tx", Proceedings, Design Automation and Test in Europe (DATE-05), Munich, Germany, March 13, 2005. (PDF)  (Slides)

  16. B.J. LaMeres and S.P. Khatri, "Performance Model for Inter-chip Communication Considering Inductive Cross-talk and Cost", Proceedings, IEEE International Symposium on Circuits and Systems (ISCAS-05), Kobe, Japan, May 23, 2005.(PDF)  (Slides)

  17. B.J. LaMeres and S.P. Khatri, "Broadband Impedance Matching for Inductive Interconnect in VLSI Packaging",Proceedings, IEEE International Conference on Computer Design (ICCD-2005), San Jose, CA, October 2, 2005. (PDF)  (Slides)
    Best Paper Award: Circuit Consideration in Process Design

  18. Brock LaMeres, Kanupriya Gulati, and Sunil Khatri "Controlling Inductive X-talk and Power in Off-chip Buses using CODECs", Proceedings, Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, Jan 24, 2006. (PDF)  (Slides)

  19. B.J. LaMeres and S.P. Khatri, "Bus Stuttering : An Encoding Technique to Reduce Inductive Noise in Off-Chip Data Transmission", Proceedings, Design Automation and Test in Europe (DATE-06), Munich, Germany, March 10, 2006.(PDF)(Slides)

  20. Samuel Harkness, Jeffrey Meirhofer, and Brock J. LaMeres, "Controlled Impedance Interconnect Using Coplanar Wire Bond Structures", Proceedings, IEEE Electrical Performance of Electronic Packaging Conference (EPEP-08), San Jose, CA, Oct 27, 2008. (PDF)(Slides)

  21. Brock J. LaMeres & Clinton Gauer, "Dynamic Reconfigurable Computing Architecture for Aerospace Applications",Proceedings, 2009 IEEE Aerospace Conference, Big Sky, MT, Mar 7-14, 2009. (PDF) (Slides)

  22. Electrical Characterization of a Novel Coaxial Die-to-Die Interconnect", Christopher McIntosh, Samuel Harkness, and Brock J. LaMeres, Proceedings, 2009 IEEE Aerospace Conference, Big Sky, MT, Mar 7-14, 2009. (PDF) (Slides)

  23. Brock LaMeres, Christopher McIntosh, and Monther Abusultan "Novel 3-D Coaxial Interconnect System for use in SiP Applications", IEEE Transactions on Advanced Packaging, vol. 33, no 1, pp. 37-47, February 2010. (PDF)

  24. Monther Abusultan, Sam Harkness, Brock J. LaMeres, and Yikun Huang, "FPGA Implementation of a Bartlett Direction of Arrival Algorithm for a 5.8GHz Circular Antenna Array", Proceedings, 2010 IEEE Aerospace Conference, Big Sky, MT, Mar 6-13, 2010. (PDF) (Slides)

  25. Clinton Gauer, Brock J. LaMeres, and David Racek, "Spatial Avoidance of Hardware Faults using FPGA Partial Reconfiguration of Tile-based Soft Processors", Proceedings, 2010 IEEE Aerospace Conference, Big Sky, MT, Mar 6-13, 2010. (PDF) (Slides)

  26. Brock J. LaMeres, Carolyn Plumb, and Fred Cady, "Improved Student Learning of Microprocessor Systems Through Hands-On and Online Experience", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Louisville, KY, June 20-23, 2010. (PDF) (Slides)

  27. Brock J. LaMeres, Todd J Kaiser, Eric Gowens, Todd Buerkle, Jeff Price, Kevin Helsley, Brian Peterson, and Robert Ray (NASA Marshall Space Flight Center), "Position Sensitive Radiation Detector Integrated with a Field Programmable Gate Array for Radiation Tolerant Computing", Proceedings, IEEE Sensors 2010 Conference, Waikoloa, HI, November 1-4, 2010. (PDF) (Slides)

  28. Brock J. LaMeres, Ray Weber, Monther Abusultan, Sam Harkness, and Yikun Huang, "Design and Test of FPGA-based Direction-of-Arrival Algorithms for Adaptive Array Antennas", Proceedings, 2011 IEEE Aerospace Conference, Mar 5-12, 2011, Big Sky, MT. (PDF) (Slides)

  29. Brock J. LaMeres, Robert F. Hodson (NASA Ames Research Center), Robert E. Ray (NASA Marshall Space Flight Center), Robert L. Akamine (NASA Langley Research Center), "Error Mitigation of Point-to-Point Communication for Fault-Tolerant Computing", Proceedings, 2011 IEEE Aerospace Conference, Mar 5-12, 2011, Big Sky, MT. (PDF) (Slides)

  30. Brock J. LaMeres and Carolyn Plumb, "A Comparison of Hands-On versus Remote Laboratory Experience for Introductory Microprocessors Courses", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Vancouver B.C, June 26-29, 2011. (PDF) (Slides)

  31. Brock J. LaMeres, Hunter Lloyd, Robb Larson, and Ahsan Mian, "The Montana MULE: A Case Study in Interdisciplinary Capstone Design", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Vancouver B.C, June 26-29, 2011. (PDF) (Slides)
    Best Paper Award: Multidisciplinary Engineering Division (PDF)

  32. Carolyn Plumb and Brock J. LaMeres, "Comparing Student Learning in a Required Electrical Engineering Undergraduate Course: Traditional Face-to-Face vs. Online", Proceedings, International Conference on Engineering Education (ICEE-2011), Belfast, Northern Ireland, UK, August 21-26, 2011. (PDF) (Slides)

  33. Buerkle, T., LaMeres, B. J., Kaiser, T., Gowens, E., Smoot, L., Heetderks, T., Schipf., K., Clem, L., Schielke, S., Luhr, R., "Ionizing Radiation Detector for Environmental Awareness in FPGA-Based Flight Computers", IEEE Sensors Journal, vol.12, no.6, pp.2229-2236, June 2012. (PDF)

  34. Raymond J. Weber, Justin A. Hogan, Brock J. LaMeres, "Power Efficiency Benchmarking of a Partially Reconfigurable, Many-Tile System Implemented on a Xilinx Virtex-6 FPGA", Proceedings, International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico, Dec. 9-11, 2013. (PDF) (Slides) (Poster)

  35. Jennifer Hane, Brock J. LaMeres, Todd Kaiser, Raymond Weber and Todd Buerkle, "Increasing the Radiation Tolerance of FPGA-Based Computers Through Redundancy and Environmental Awareness", Journal of Aerospace Information Systems, vol. 11, no. 2, pp. 61-75, February 2014. (doi: 10.2514/1.I010106) (PDF)

  36. Justin A. Hogan, Raymond Weber, and Brock J. LaMeres, "A Network-on-Chip for Radiation Tolerant, Multi-core FPGA Systems", Proceedings, 2014 IEEE Aerospace Conference, Mar 3-7, 2014, Big Sky, MT. (PDF) (Slides)

  37. Brock J. LaMeres and Carolyn Plumb, "Comparing Online to Face-to-Face Delivery of Undergraduate Digital Systems Content", IEEE Transactions on Education, vol. 57, no. 2, pp. 99-106, May 2014. (doi: 10.1109/TE.2013.2277031) (PDF)

  38. Adrien Lambert, Ahsan Mian, Justin Hogan, Todd Kaiser and Brock J. LaMeres "Finite Element Analysis of System-Level Electronic Packages for Space Applications", Journal of Computational Engineering, vol. 2015, Article ID 428073, 9 pages, March 25, 2015. (doi:10.1155/2015/428073) (PDF)

  39. Brock J. LaMeres and Carolyn Plumb, "Using Adaptive Learning Environments to Overcome Background Deficiencies and Facilitate Mastery of Computer Engineering Content", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Seattle, WA, June 14-17, 2015. (PDF) (Poster)

  40. B. J. LaMeres, S. Harkness, M. Handley, P. Moholt, C. Julien, T. Kaiser, D. Klumpar, K. Mashburn, L. Springer, G. Crum,  “RadSat – Radiation Tolerant SmallSat Computer System”, Proceedings, SmallSat Conference, Logan, UT, Aug. 9-13, 2015. (PDF) (Slides)

  41. Lux, N., Kalonde, G., LaMeres, B., & Perchy, D., “Using Minecraft to Support STEM Learning”, Proceedings, World Conference on E-Learning (E-LEARN 2015), Kona, HI, Oct. 19-22, 2015.

  42. Lux, N., Lux, C., Kalonde, G., LaMeres, B., Will-Dubyak, K., Downey, J., “Online Professional Development to Support Side-By-Side Learning and Lesson Study”, Proceedings, World Conference on E-Learning (E-LEARN 2015 ), Kona, HI, Oct. 19-22, 2015.

  43. Todd J Kaiser, Brock J. LaMeres, Todd Buerkle, Justin A. Hogan, and Raymond J. Weber,  "Experimental Conformation of Ionizing Sensing for Space Radiation Environmental Awareness", IEEE Sensors Journal, vol.16, no.10, pp.3482-3483, May 2016. (PDF)

  44. Carolyn Plumb and Brock J. LaMeres, "Using an e-Learning Environment to Create a Baseline of Understanding of Digital Logic Knowledge", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, New Orleans, LA, June 26-29, 2016. (PDF) (Poster)

  45. Brock J. LaMeres, Carolyn Plumb and Jessi Smith, "A Personalized Learning System to Address Background Deficiencies and Highlight the Value of Digital Logic", Proceedings, International Conference on Engineering Education & Research (iCEER), Sydney, Australia, November 21-24, 2016. (PDF) (Slides)

  46. Raymond J. Weber, Brock J. LaMeres, and Justin A. Hogan, “Real-Time, Dynamic Hardware Accelerators for BLAS Computation”, International Journal on Recent and Innovation Trends in Computing and Communication (IJRITCC)”, Vol./ 5 Issue 1, January 2017. (PDF)

  47. Connor R. Julien, Brock J. LaMeres, and Raymond J. Weber,  “An FPGA-based Radiation Tolerant SmallSat Computer System”, Proceedings, 2017 IEEE Aerospace Conference, Big Sky, MT, Mar 4-11, 2017.

  48. Brock J. LaMeres and Carolyn Plumb, "Measuring the Impact of Adaptive Learning Modules in Digital Logic Courses", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Columbus, OH, June 25-28, 2017.

  49. Brock J. LaMeres and Jessi Smith, "Engineering a Culture of Engagement by Improving Student Engagement ", Proceedings, American Society for Engineering Education (ASEE) Annual Conference, Columbus, OH, June 25-28, 2017.

  50. Justin Hogan, Raymond Weber, and Brock J. LaMeres, “Reliability Analysis of Field Programmable Gate Array Based Space Computer Architectures”, Journal of Aerospace Information Systems, Vol. 14, No. 4 (2017), pp. 247-258. 

Refereed Conference Proceedings

These are formal papers that were invited or accepted for presentation at a scholarly conference based on peer review of an abstract or extended summary only. 

  1. Brock J. LaMeres, "Logic Analyzer Probing Techniques for High-Speed Digital Systems", Proceedings, DesignCon 2003, High Performance Systems Track, Santa Clara, CA, Jan. 27, 2003. (PDF) (Slides) 

  2. Brock LaMeres, "High Speed Digital Systems Require Advanced Probing Techniques for Logic Analyzer Debug",Proceedings, JEDEX San Jose Memory Conference, Memory Futures Track, San Jose, CA, March 24, 2003. (PDF) (Slides)

  3. B.J. LaMeres and S.P. Khatri, "Design of Low-Power Diff Repeater Using Low-Voltage & Charge Recycling",Proceedings, DesignCon 2005, Santa Clara, CA, Feb 2, 2005. (PDF) (Slides)

  4. B.J. LaMeres and S.P. Khatri, "Performance Model for Inter-Chip Busses Considering BW and Cost", Proceedings, DesignCon 2005, , Santa Clara, CA, Feb 2, 2005. (PDF) (Slides)
    Best Paper Award : Board Level Design Track (PDF)

  5. Brock LaMeres, Brent Holcombe, & George Marshall, "Connector-Less Logic Analyzer Probing - Mechanical and Electrical Advantages", Proceedings, DesignCon 2005, Santa Clara, CA, Feb 2, 2005. (PDF) (Slides)

  6. B.J. LaMeres and S.P. Khatri, "Design of Low-Power Diff Repeater Using Low-Voltage & Charge Recycling",Proceedings, DesignCon East 2005, Worcester, MA, Sept 22, 2005. (PDF) (Slides)

  7. B.J. LaMeres and S.P. Khatri, "Performance Model for Inter-Chip Busses Considering Bandwidth & Cost",Proceedings, DesignCon East 2005, Worcester, MA, Sept 22, 2005. (PDF) (Slides)

  8. Brock LaMeres, Brent Holcombe, & G. Marshall, "Connector-Less Logic Analyzer Probing - Mechanical and Electrical Advantages", Proceedings, DesignCon East 2005, Worcester, MA, Sept 22, 2005. (PDF) (Slides)

  9. Brock LaMeres, Kanupriya Gulati, Rajesh Garg, & Sunil Khatri, "Impedance Matching Techniques for VLSI Packaging",Proceedings, DesignCon 2006, Santa Clara, CA, Feb 6, 2006. (PDF) (Slides)

  10. Brock J. LaMeres and Chris McIntosh, "Off-Chip Coaxial to Microstrip Transition Using MEMS Trench", Proceedings, 13th NASA Symposium on VLSI Design, Post Falls, ID, June 5, 2007. (PDF) (Slides)

  11. Brock J. LaMeres, Brent Holcombe, and Emad Soubh, "Characterization Methodology for High Density Microwave Fixtures", Proceedings, DesignCon 2008, Santa Clara, CA, February 4, 2008. (PDF) (Slides)
    Best Paper Award Finalist: Test and Measurement Track (PDF)

  12. Monther Abusultan and Brock J. LaMeres, "Off-Chip Coaxial to Coplanar Transition Using a MEMS Trench",Proceedings, 3D/SiP Advanced Packaging Symposium, Durham, NC, April 28, 2008. (PDF) (Slides)

  13. Christopher McIntosh and Brock J. LaMeres, "Fab Process For High Speed Coaxial To Coplanar Off-Chip Interconnect", Proceedings, Electronics Systems-Integration Technology Conference (ESTC 2008), Greenwich, London, UK, Sept. 1-4, 2008. (PDF) (Slides)

  14. Brock J. LaMeres & Clinton Gauer, "A Power-Efficient Design Approach to Radiation Hardened Digital Circuitry using Dynamically Selectable Triple Modulo Redundancy", Proceedings, Military and Aerospace Programmable Logic Devices (MAPLD) Conference, Annapolis, MD, Sept. 15, 2008,. (PDF) (Slides)

  15. Robert Ray (NASA-ESMD), Brock LaMeres, Todd Kaiser, Ross Snider, David Andrews (U of Alabama), "Radiation Tolerant Computing for the Europa Jupiter System Mission", Proceedings, Europa Jupiter Systems Mission (EJSM) Instrument Workshop, Johns Hopkins Applied Physics Laboratory, Laurel, MD, July 15-17, 2009. (Poster #1 PDF) (Poster #1 PDF)

  16. Brock J. LaMeres, Erwin Dunbar, Pat Kujawa, David Racek, Anthony Thomason, Colin Tilleman and Clint Gauer, "Design of a Radiation Tolerant Computing System Based on a Many-Core FPGA Architecture", Proceedings, Military and Aerospace Programmable Logic Devices (MAPLD) Conference, NASA Goddard Space Flight Center, Greenbelt, MD, Sept. 11-4, 2009. (PDF) (Slides)

  17. Brock J. LaMeres and Hunter Lloyd, "A Case Study in Team Teaching an Online Course", XLi 2011 Extended Learning Institute, Bozeman, MT , Mar. 7-8, 2011. 

  18. Justin A. Hogan, Raymond J. Weber, Brock J. LaMeres and Todd Kaiser, "Network-on-Chip for a Partially Reconfigurable Many-Core FPGA System", Proceedings, International Conference on Supercomputing, Eugene, OR, June 10-14, 2013. (Poster)

  19. Raymond J. Weber, Justin A. Hogan, Brock J. LaMeres and Todd Kaiser, "Power efficiency in a partially reconfigurable multiprocessor system", Proceedings, International Conference on Supercomputing, Eugene, OR, June 10-14, 2013.(Poster)

  20. Brock J. LaMeres and Carolyn Plumb, "Infusing Demographic-Specific Applications into a Digital Logic Adaptive Learning System", Proceedings, Hawaiian International Conference on Education (HICE), Honolulu, HI, Jan. 3-6, 2016. (PDF) (Slides)

  21. Nick Lux, Brock J. LaMeres, Shannon Willoughby, Bryce Hughes, “Crafting Spatial Skills: The Use of a Minecraft-Based Intervention to Aid in the Development of Elementary Learners’ Spatial Ability”, 2017 Annual Meeting for the Society for Information Technology and Teacher Education (SITE), Austin, TX, Mar. 5-9, 2017.

Non-Refereed Publications / Trade Journals

  1. Brock J. LaMeres, "FPGA Logic Analysis", 
     - Printed Circuit Design, pp 21-24, July 2002. (PDF) 
    - Elektro Automation, July 2002. (PDF) 

  2. Brock LaMeres, "Choosing a Logic Analyzer Probe", Electronic Products, November 2003. (PDF)

  3. Brock LaMeres, "Connectorless Probing Reduces Loading Impact on DDR Memory Validation", 
    - TechOnLine, March 2004. (PDF)
    - Micro Electronics Japan, June 2004. (PDF)

  4. B. LaMeres & K. Johnson, "Your Logic Analyzer Can Probe those Forgotten Signals",
    - EE Product Center, May 2004. (PDF)
    - Planet Analog, June 8, 2004. (PDF)
    - Component Times, May 2004. (PDF)
    - Wall Street & Technology, May 2004. (PDF)
    - Bank Systems & Technology, May 2004. (PDF)

  5. Brock LaMeres, "Differential Logic Analyzer Probing",
    - AnalogZone, June 2004. (PDF)
    - Mesures (in German), July 2005. (PDF)

  6. Brock LaMeres, "Physical Connections are Key in FPGA Debug", COTS Journal, June 2004. (PDF)

  7. B. LaMeres & K. Johnson, "Taking Logic-Analyzer Probing For Granted Can Spell Trouble",
    - Electronic Design, August 2004. (PDF)
    - Electronic Products China, July 2004. (PDF)

  8. LaMeres & Holcombe, "Connectorless Probes Simplify Digital Design", Electronic Engineering Times Asia, Aug 2004. (PDF)

  9. Brock LaMeres, "FPGA I/O - When to go Serial", FPGA and Programmable Logic Journal, August 2004. (PDF)

  10. Brock LaMeres, "How Much Bandwidth Does Your Logic Analyzer Need", TechOnLine, November 2004. (PDF)

  11. Brock LaMeres, "When to Make the Move to Advanced Probing Technology in Logic Analysis", RF Design, July 2005. (PDF)

  12. Brock LaMeres, "Connectorless Probing Enables HyperTransport Debug at 2.4Gb/s",
    - TechOnline (www.techonline.com), October 2005. (PDF)
    - Nuevos Retos En Interconexiones, February 2006. (PDF)

  13. B. LaMeres & B. Holcombe, "Compression Probe Technology Makes Sense in Logic Analyzers", Connector Specifier Magazine, June 2006. (PDF)

  14. Brock LaMeres & Todd Kaiser, "Sensor for Spatial Detection of Single-Event Effects in Semiconductor-Based Electronics", NASA Tech Briefs, Vol. 38, No.2, pp.43, February 2014. (PDF)

  15. Brock J. LaMeres, “My First Job – The Learning Continues…”, IEEE Potentials, January 2015.  (PDF)